RTL8101 Ver la hoja de datos (PDF) - Unspecified

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RTL8101

REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER AND MC’97 CONTROLLER WITH POWER MANAGEMENT

Unspecified 

4.8 Test and Other Pins

Symbol

RTT3

RTSET

Type

TEST

I/O

Pin No

63

65

CLKRUNB

I/O

50

ROMCS/OEB

O

NC

-

51

56, 69

RTL8101L

Description

Chip test pin.

This pin must be pulled low by a resistor. Please refer to the application

circuit for the correct value.

Clock run: This signal is used by the RTL8101L to request starting (or

speeding up) the clock, CLK. CLKRUNB also indicates the clock status.

For the RTL8101L, CLKRUNB is an open drain output as well as an

input. The RTL8101L requests the central resource to start, speed up, or

maintain the interface clock by the assertion of CLKRUNB. For the host

system, it is an S/T/S signal. The host system (central resource) is

responsible for maintaining CLKRUNB asserted, and for driving it high

to the negated (deasserted) state.

ROM Chip select and output enable: This is the chip select signal and

output enable of the Boot PROM.

Reserved

2003-05-28

10

Rev.1.3

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