RTL8130 Ver la hoja de datos (PDF) - Realtek Semiconductor

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RTL8130

REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH MII & AUI INTERFACE

Realtek Semiconductor 

RTL8130 Preliminary

11 = 64K + 16 byte

10-8

R/W

MXDMA2, 1, 0 Max DMA Burst Size per Rx DMA Burst: This field sets the

maximum size of the receive DMA data bursts according to the

Following table:

000 = 16 bytes

001 = 32 bytes

010 = 64 bytes

011 = 128 bytes

100 = 256 bytes

101 = 512 bytes

110 = 1024 bytes

111 = unlimited

7

R/W

WRAP

When set to 0: The RTL8130 will transfer the rest of the packet data

into the beginning of the Rx buffer if this packet has not been

completely moved into the Rx buffer and the transfer has arrived at

the end of the Rx buffer.

When set to 1: The RTL8130 will keep moving the rest of the packet

data into the memory immediately after the end of the Rx buffer, if

this packet has not been completely moved into the Rx buffer and the

transfer has arrived at the end of the Rx buffer. The software driver

must reserve at least 1.5K bytes buffer to accept the remainder of the

packet. We assume that the remainder of the packet is X bytes. The

next packet will be moved into the memory from the X byte offset at

the top of the Rx buffer.

This bit is invalid when Rx buffer is selected to 64K bytes.

6

-

-

Reserved

5

R/W

AER

Accept Error Packet: When set to 1, all packets with CRC error,

alignment error, and/or collided fragments will be accepted. When set

to 0, all packets with CRC error, alignment error, and/or collided

fragments will be rejected.

4

R/W

AR

Accept Runt: This bit allows the receiver to accept packets that are

smaller than 64 bytes. The packet must be at least 8 bytes long to be

accepted as a runt. Set to 1 to accept runt packets.

3

R/W

AB

Set to 1 to accept broadcast packets, 0 to reject.

2

R/W

AM

Set to 1 to accept multicast packets, 0 to reject.

1

R/W

APM

Set to 1 to accept physical match packets, 0 to reject.

0

R/W

AAP

Set to 1 to accept all packets with physical destination address, 0 to

reject.

5.9 9346CR: 93C46 Command Register (Offset 0050h, R/W)

Bit

R/W

Symbol

Description

7-6

R/W

EEM1-0

These 2 bits select the RTL8130 operating mode.

EEM1

0

0

1

EEM0

0

1

0

Operating Mode

Normal (RTL8130 network/host communication mode)

Auto-load: Entering this mode will make the RTL8130

load the contents of 93C46 like when the RSTB signal is

asserted. This auto-load operation will take about 2 ms.

After it is completed, the RTL8130 goes back to the

normal mode automatically (EEM1 = EEM0 = 0) and all

the other registers are reset to default values.

93C46 programming: In this mode, both network and host

1999/5/30

16

Ver.1.1

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