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RTL8029AS

Realtek PCI Full-Duplex Ethernet Controller with built-in SRAM

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RTL8029AS Preliminary

1. FEATURES............................................................................................................................................................4

2. GENERAL DESCRIPTION..................................................................................................................................5

3. PIN CONFIGURATION .......................................................................................................................................6

4. PIN DESCRIPTIONS ............................................................................................................................................7

4.1. SIGNAL TYPE DEFINITION.......................................................................................................................................7

4.2. POWER PINS...........................................................................................................................................................7

4.3. PCI BUS INTERFACE PINS.......................................................................................................................................7

4.4. MEMORY INTERFACE PINS (INCLUDING BROM, EEPROM).....................................................................................8

4.5. MEDIUM INTERFACE PINS.......................................................................................................................................9

4.6. LED OUTPUT PINS.................................................................................................................................................9

5. REGISTER DESCRIPTIONS ............................................................................................................................. 10

5.1. GROUP 1: NE2000 REGISTERS.............................................................................................................................. 10

5.1.1. Register Table ............................................................................................................................................. 10

5.1.2. Register Functions....................................................................................................................................... 12

5.1.2.1. NE2000 Compatible Registers ...............................................................................................................................12

CR: Command Register (00H; Type=R/W) ....................................................................................................................12

ISR: Interrupt Status Register (07H; Type=R/W in Page0) ............................................................................................13

IMR: Interrupt Mask Register (0FH; Type=W in Page0, Type=R in Page2) ....................................................................14

DCR: Data Configuration Register (0EH; Type=W in Page0, Type=R in Page2).............................................................14

TCR: Transmit Configuration Register (0DH; Type=W in Page0, Type=R in Page2) ......................................................14

TSR: Transmit Status Register (04H; Type=R in Page0) ................................................................................................15

RCR: Receive Configuration Register (0CH; Type=W in Page0, Type=R in Page2)........................................................15

RSR: Receive Status Register (0CH; Type=R in Page0) .................................................................................................15

CLDA0,1: Current Local DMA Registers (01H & 02H; Type=R in Page0).....................................................................16

PSTART: Page Start Register (01H; Type=W in Page0, Type=R in Page 2) ...................................................................16

PSTOP: Page Stop Register (02H; Type=W in Page0, Type=R in Page2) .......................................................................16

BNRY: Boundary Register (03H; Type=R/W in Page0)..................................................................................................16

TPSR: Transmit Page Start Register (04H; Type=W in Page0) .......................................................................................16

TBCR0,1: Transmit Byte Count Registers (05H & 06H; Type=W in Page0)...................................................................16

NCR: Number of Collisions Register (05H; Type=R in Page0).......................................................................................16

FIFO: First In First Out Register (06H; Type=R in Page0) .............................................................................................16

CRDA0,1: Current Remote DMA Address registers (08H & 09H; Type=R in Page0) .....................................................16

RSAR0,1: Remote Start Address Registers (08H & 09H; Type=W in Page0)..................................................................16

RBCR0,1: Remote Byte Count Registers (0AH & 0BH; Type=W in Page0) ...................................................................16

CNTR0: Frame Alignment Error Tally Counter Register (0DH; Type=R in Page0).........................................................16

CNTR1: CRC Error Tally Counter Register (0EH; Type=R in Page0) ............................................................................17

CNTR2: Missed Packet Tally Counter Register (0FH; Type=R in Page0) .......................................................................17

PAR0-5: Physical Address Registers (01H - 06H; Type=R/W in Page1) .........................................................................17

CURR: Current Page Register (07H; Type=R/W in Page1)............................................................................................17

MAR0-7: Multicast Address Register (08H - 0FH; Type=R/W in Page1) .......................................................................17

5.1.2.2. RTL8029AS Defined Registers ..............................................................................................................................17

9346CR: 9346 Command Register (01H; Type=R/W except Bit0=R) .............................................................................18

CONFIG0: RTL8029AS Configuration Register 0 (03H; Type=R)..................................................................................18

CONFIG1: Reserved......................................................................................................................................................18

CONFIG2: RTL8029AS Configuration Register 2 (05H; Type=R except Bit[7:5]=R/W).................................................18

CONFIG3: RTL8029AS Configuration Register 3 (06H; Type=R except Bit[6,2:1]=R/W)..............................................19

HLTCLK: Halt Clock Register (09H; Type=W) .............................................................................................................20

8029ASID0,1: RTL8029AS ID = 8029H (0E, 0FH; Type=R) .........................................................................................20

5.2. GROUP 2: PCI CONFIGURATION SPACE REGISTERS ................................................................................................ 20

5.2.1. PCI Configuration Space Table ................................................................................................................... 20

5.2.2. PCI Configuration Space functions.............................................................................................................. 21

VID: Vendor ID Register (01-00H; Type=R) .......................................................................................................................21

DID: Device ID Register (03-02H; Type=R)........................................................................................................................21

RID: Revision ID Register (08H; Type=R) ..........................................................................................................................22

LS009.0

2

1997.01.16

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