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RTL8139D Ver la hoja de datos (PDF) - Realtek Semiconductor

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RTL8139D Datasheet PDF : 67 Pages
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RTL8139DL
Datasheet
5.9. 9346CR: 93C46 Command Register
(Offset 0050h, R/W)
This register is used for issuing commands to the RTL8139D(L). These commands are issued by setting the
corresponding bits for the function. A warm software reset along with individual reset and enable/disable
for transmitter and receiver are provided as well.
Bit
R/W
Symbol
Description
7-6
R/W
EEM1-0
Operating Mode: These 2 bits select the RTL8139D(L) operating
mode.
EEM1
0
0
1
1
EEM0
0
1
0
1
Operating Mode
Normal (RTL8139D(L) network/host communication
mode)
Auto-load: Entering this mode will make the
RTL8139D(L) load the contents of 93C46 like when the
RSTB signal is asserted. This auto-load operation will
take about 2 ms. After it is completed, the RTL8139D(L)
goes back to the normal mode automatically (EEM1 =
EEM0 = 0) and all the other registers are reset to default
values.
93C46 programming: In this mode, both network and host
bus master operations are disabled. The 93C46 can be
directly accessed via bit3-0 which now reflect the states of
EECS, EESK, EEDI, & EEDO pins respectively.
Config register write enable: Before writing to CONFIG0,
1, 3, 4 registers, and bit13, 12, 8 of BMCR(offset
62h-63h), the RTL8139D(L) must be placed in this mode.
This will prevent RTL8139D(L)'s configurations from
accidental change.
4-5
-
3
R/W
2
R/W
1
R/W
0
R
-
EECS
EESK
EEDI
EEDO
Reserved
These bits reflect the state of EECS, EESK, EEDI & EEDO pins in
auto-load or 93C46 programming mode.
Single Chip Multifunction 10/100 Ethernet Controller w/Power Management 18 Track ID: JATR-1076-21 Rev. 1.2

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