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SAA2032

Digital equalization for the tape drive processing of the DCC system

Philips Electronics 

Philips Semiconductors

Digital equalization for the tape

drive processing of the DCC system

Product specification

SAA2032

RDCLK

VIN

t su

VIN

stable

tsu > 80 ns; set-up time VIN before RDCLOCK HIGH.

Typical frequency for RDCLK = 3.072 MHz.

Typical frequency for RDSYNC = 307.2 kHz.

Fig.5 Timing.

MCD478

signal

from

tape

td1

td2

AENV

MCD488 - 1

td1 = td2 = between 0.5 and 1.0 auxiliary block lengths.

Fig.6 Diagram of AENV signal.

February 1995

9

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