SAA7114H Ver la hoja de datos (PDF) - Philips Electronics
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SAA7114H
Philips Electronics
SAA7114H Datasheet PDF : 147 Pages
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Philips Semiconductors
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb filter, VBI data slicer and high performance scaler
Product specification
SAA7114
PIN
SYMBOL
LQFP100 BGA156
VSSD(ICO2)
63
E11
HPD7
64
A13
HPD6
65
D12
HPD5
66
C12
HPD4
67
B12
VDDD(ICO4)
68
HPD3
69
D11
A12
HPD2
70
C11
HPD1
71
B11
HPD0
72
A11
TEST1
73
B10
TEST2
74
C10
VDDD(EP4)
75
VSSD(EP3)
76
TEST3
77
D10
H4
J3
TEST4
78
J1
TEST5
79
J2
XTRI
80
K1
XPD7
81
K2
XPD6
82
K3
VDDD(ICO5)
83
J4
XPD5
84
L1
XPD4
85
L2
XPD3
86
L3
XPD2
87
M1
VSSD(ICO3)
88
K4
XPD1
89
M2
TYPE(1)
DESCRIPTION
P internal digital core supply ground 2
I/O MSB of host port data I/O, carries CB-CR chrominance information in
16-bit video I/O modes
I/O MSB − 1 of host port data I/O, carries CB-CR chrominance information
in 16-bit video I/O modes
I/O MSB − 2 of host port data I/O, carries CB-CR chrominance information
in 16-bit video I/O modes
I/O MSB − 3 of host port data I/O, carries CB-CR chrominance information
in 16-bit video I/O modes
P internal digital core supply voltage 4 (+3.3 V)
I/O MSB − 4 of host port data I/O, carries CB-CR chrominance information
in 16-bit video I/O modes
I/O MSB − 5 of host port data I/O, carries CB-CR chrominance information
in 16-bit video I/O modes
I/O MSB − 6 of host port data I/O, carries CB-CR chrominance information
in 16-bit video I/O modes
I/O LSB of host port data I/O, carries CB-CR chrominance information in
16-bit video I/O modes
I do not connect; reserved for future extensions and for testing: scan
input
I do not connect; reserved for future extensions and for testing: scan
input
P external digital pad supply voltage 4 (+3.3 V)
P external digital pad supply ground 3
I do not connect; reserved for future extensions and for testing: scan
input
O do not connect; reserved for future extensions and for testing: scan
output
I do not connect; reserved for future extensions and for testing: scan
input
I X port output control signal, affects all X port pins (XPD7 to XPD0,
XRH, XRV, XDQ and XCLK), enable and active polarity is under
software control (bits XPE in subaddress 83H)
I/O MSB of expansion port data
I/O MSB − 1 of expansion port data
P internal digital core supply voltage 5 (+3.3 V)
I/O MSB − 2 of expansion port data
I/O MSB − 3 of expansion port data
I/O MSB − 4 of expansion port data
I/O MSB − 5 of expansion port data
P internal digital core supply ground 3
I/O MSB − 6 of expansion port data
2004 Mar 03
9
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