SAA7121 Ver la hoja de datos (PDF) - Philips Electronics
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SAA7121 Datasheet PDF : 32 Pages
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Philips Semiconductors
Digital Video Encoder (ConDENC)
Preliminary specification
SAA7120; SAA7121
handbook, h1alfpage
Gv
(dB)
(1)
0
MBE736
−1
−2
−3
−4
−5
0
2
4 f (MHz) 6
(1) CCRS1 = 0; CCRS0 = 0.
Fig.4 Luminance transfer characteristic 2.
During reset (RESET = LOW) and after reset is released,
all digital I/O stages are set to input mode. A reset forces
the I2C-bus interface to abort a running bus transfer and
sets register 3A to 03H, register 61 to 06H,
registers 6BH and 6EH to 00H and bit TTX60 to 0.
All other control registers are not influenced by a reset.
Encoder
VIDEO PATH
The encoder generates out of Y, U and V baseband
signals luminance and colour subcarrier output signals,
suitable for use as CVBS or separate Y and C signals.
Luminance is modified in gain and in offset (the latter
programmable in a certain range to enable different black
level set-ups). A fixed synchronization level in accordance
with standard composite synchronization schemes is
inserted. The inserted blanking level is programmable to
allow for manipulations with Macrovision anti-taping.
Additional insertion of AGC super-white pulses,
programmable in height, is supported.
handbook,
Gv
fu6ll
pagewidth
(dB)
0
−6
−12
−18
−24
−30
−36
−42
−48
−54
0
(1) SCBW = 1.
(2) SCBW = 0.
(1)
2
(2)
4
6
8
10
Fig.5 Chrominance transfer characteristic 1.
1997 Jan 06
7
MBE737
12 f (MHz) 14
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