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SAA7199B

Digital Video Encoder (DENC) GENLOCK-capable

Philips Electronics 

Philips Semiconductors

Digital Video Encoder (DENC)

GENLOCK-capable

Product specification

SAA7199B

PINNING

SYMBOL

VSSD1

VDDD1

VSN/CSYN

PD1(0)

PD1(1)

PD1(2)

PD1(3)

PD1(4)

PD1(5)

PD1(6)

PD1(7)

PD2(0)

PD2(1)

PD2(2)

PD2(3)

PD2(4)

PD2(5)

PD2(6)

PD2(7)

LDV

VDDD2

VSSD2

CB

PD3(0)

PD3(1)

PD3(2)

PD3(3)

PD3(4)

PD3(5)

PD3(6)

PD3(7)

MPK

A0

PIN

DESCRIPTION

1 digital ground 1 (0 V)

2 digital supply 1 (5 V)

3 vertical sync output (3-state), conditionally composite sync output; active LOW or active HIGH

4 data 1 input: digital signal R (red) respectively V signal; bit 0 (formats in Tables 19 to 25)

5 data 1 input: digital signal R (red) respectively V signal; bit 1 (formats in Tables 19 to 25)

6 data 1 input: digital signal R (red) respectively V signal; bit 2 (formats in Tables 19 to 25)

7 data 1 input: digital signal R (red) respectively V signal; bit 3 (formats in Tables 19 to 25)

8 data 1 input: digital signal R (red) respectively V signal; bit 4 (formats in Tables 19 to 25)

9 data 1 input: digital signal R (red) respectively V signal; bit 5 (formats in Tables 19 to 25)

10 data 1 input: digital signal R (red) respectively V signal; bit 6 (formats in Tables 19 to 25)

11 data 1 input: digital signal R (red) respectively V signal; bit 7 (formats in Tables 19 to 25)

12 data 2 input: digital signal G (green) respectively Y signal or indexed colour data; bit 0

(formats in Tables 19 to 25)

13 data 2 input: digital signal G (green) respectively Y signal or indexed colour data; bit 1

(formats in Tables 19 to 25)

14 data 2 input: digital signal G (green) respectively Y signal or indexed colour data; bit 2

(formats in Tables 19 to 25)

15 data 2 input: digital signal G (green) respectively Y signal or indexed colour data; bit 3

(formats in Tables 19 to 25)

16 data 2 input: digital signal G (green) respectively Y signal or indexed colour data; bit 4

(formats in Tables 19 to 25)

17 data 2 input: digital signal G (green) respectively Y signal or indexed colour data; bit 5

(formats in Tables 19 to 25)

18 data 2 input: digital signal G (green) respectively Y signal or indexed colour data; bit 6

(formats in Tables 19 to 25)

19 data 2 input: digital signal G (green) respectively Y signal or indexed colour data; bit 7

(formats in Tables 19 to 25)

20 load data clock input signal to input interface (samples PDn(7 to 0), CB, MPK, KEY and RTCI)

21 digital supply 2 (5 V)

22 digital ground 2 (0 V)

23 composite blanking input; active LOW

24 data 3 input: digital signal B (blue) respectively U signal; bit 0 (formats in Tables 19 to 25)

25 data 3 input: digital signal B (blue) respectively U signal; bit 1 (formats in Tables 19 to 25)

26 data 3 input: digital signal B (blue) respectively U signal; bit 2 (formats in Tables 19 to 25)

27 data 3 input: digital signal B (blue) respectively U signal; bit 3 (formats in Tables 19 to 25)

28 data 3 input: digital signal B (blue) respectively U signal; bit 4 (formats in Tables 19 to 25)

29 data 3 input: digital signal B (blue) respectively U signal; bit 5 (formats in Tables 19 to 25)

30 data 3 input: digital signal B (blue) respectively U signal; bit 6 (formats in Tables 19 to 25)

31 data 3 input: digital signal B (blue) respectively U signal; bit 7 (formats in Tables 19 to 25)

32 multi-purpose key input; active HIGH

33 subaddress bit A0 input for microcontroller access (Table 3)

1996 Sep 27

4

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