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SAF-XC886-6FFA

8-Bit Single-Chip Microcontroller

Infineon Technologies 

XC886/888CLM

3

Functional Description

Functional Description

3.1

Processor Architecture

The XC886/888 is based on a high-performance 8-bit Central Processing Unit (CPU)

that is compatible with the standard 8051 processor. While the standard 8051 processor

is designed around a 12-clock machine cycle, the XC886/888 CPU uses a 2-clock

machine cycle. This allows fast access to ROM or RAM memories without wait state.

Access to the Flash memory, however, requires an additional wait state (one machine

cycle). The instruction set consists of 45% one-byte, 41% two-byte and 14% three-byte

instructions.

The XC886/888 CPU provides a range of debugging features, including basic stop/start,

single-step execution, breakpoint support and read/write access to the data memory,

program memory and SFRs.

Figure 6 shows the CPU functional blocks.

Data Sheet

Prelimary

17

V0.1, 2006-02

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