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SC251

Step-down DC-DC Converter with Bias LDO for WCDMA Amplifiers

Semtech Corporation 

SC251

POWER MANAGEMENT

Applications Information (Cont.)

Maximum Load

Typical

Load

Minimum Load

In high power mode the PA gain is constant, but output

impedance is lower and the subsequent input voltage

required to achieve the desired output power is less than

in low power mode. The SC251 output, therefore, switches

to the solid line curve in the VDAC-to- VOUT in Figure 2. The

lower output voltage required improves efficiency over a

single mode system by lowering the voltage required for a

fixed current load.

VOUT(V)

Figure 3 - Load Profile-Low Power Mode

Maximum Load

Typical Load

Minimum Load

VOUT(V)

Figure 4 - Load Profile-High Power Mode

High Power Mode

The SC251 enters high power mode when the VMODE

pin is pulled low. In this mode the VDAC to VOUT transfer

function is set to follow the solid line curve shown in

Figure 2. The output voltage again starts at 0.5V and

increases exponentially as the power demand increases

until it reaches the maximum of 3.4V. A typical WCDMA

load profile for high power mode with the minimum and

maximum current limits is shown in Figure 4. If the power

control for the PA requires the output voltage to exceed

3.4V, then the SC251 goes into pass-through mode and

VOUT is equal to VIN minus the voltage dropped across the

pass-through device (V ).

dropout

100% Duty Cycle Operation

When the input supply voltage approaches the

programmed output voltage the PMOS on-time extends

until the supply voltage gets within 400mV of the output

voltage. At this point both the internal pass device and the

PMOS switching device automatically turns on, connecting

VIN to VOUT. The bypass device and PMOS switching device

remains fully on until either the VIN voltage is increased

by 150mV or the programmed VOUT voltage is reduced

such that VIN – VOUT is greater than 650mV. Bypassing the

impedance of the inductor and switching PMOS device

improves efficiency by minimizing the voltage drop from

VOUT to VIN.

Pass-Through Mode

This mode is entered when the VDAC voltage reaches

1.28V. If the demanded output voltage is within 400mV

of the input voltage the device automatically enters

pass-through as this exceeds the maximum controlled

duty cycle of the power converter. In pass-through mode

the device enables an internal P-channel MOSFET that

bypasses the converter, connecting the output directly to

the input. The RDSon of this FET is extremely low so there is

little voltage drop across the part. If the system designer

determines that the pass-through resistance is too high

for the application, there is an optional gate-drive output

that can be used with an external switch.

The GD pin becomes active-low only when VDAC is greater

than 1.4V. This pin can be connected to the gate of an

external low-RDSon P-channel MOSFET whose source and

drain are connected to VIN and VOUT, respectively. This

option allows the lowest insertion loss possible between

VIN and VOUT . Note that GD should not be loaded with a DC

current. GD is monitored so that the part remains in pass-

through until GD reaches within 600mV of VIN.

Bias Supply Output

In addition to the main output the SC251 also provides a

low current LDO reference output that can be used as a

© 2006 Semtech Corp.

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