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MAX2233EEE
(Rev.:1999)

900MHz ISM-Band, 250mW Power Amplifiers with Analog or Digital Gain Control

Maxim Integrated 

900MHz ISM-Band, 250mW Power Amplifiers

with Analog or Digital Gain Control

___________________________MAX2233

Digital Gain Control

and Power Management

The MAX2233 responds to logic-level signals at the

device’s 2-bit DAC inputs, D0 and D1, placing the

device in shutdown mode or into one of three discrete

output power levels. See Table 2 for operating modes

and output power levels. Setting D0 and D1 to a logic-

level low places the device in shutdown mode and

reduces supply current to 0.2µA. The VGA, driver, and

output stage are off in shutdown mode, while the input

impedance is only slightly changed. Setting D0 and D1

to one of the other three modes adjusts the output

power to one of three discrete levels in 10dB steps.

Thermal Shutdown

The MAX2232/MAX2233 feature a thermal shutdown

mode that helps to protect the device from damage

when the die temperature becomes excessive. If the

temperature of the die exceeds the thermal shutdown

temperature, TTH, the VGA is forced into a low-gain

mode and output power is reduced to a minimum. After

Table 1. MAX2232 Operating Modes

MODE

Shutdown

Standby

Variable Gain

Maximum Gain

X = Don’t care

V S HDN

< 0.6V

> 2.0V

> 2.0V

> 2.0V

VCTRL

X

≤ 0.4V

0.6V ≤ VCTRL

< 2.2V

> 2.2V

OUTPUT POWER

(PRFIN = 0dBm,

VCC = +3.6V)

< -35dBm

< -35dBm

0dBm to +24dBm

+24 dBm

RAMP+ 14

RAMP- 13

SHDN 3

VCC 11

CTRL 4

VCC 12

RFIN 1

VCC GND

16 15

BIAS

MAX2232

TEMP

SENSOR

10 TSET

8

RFOUT

VGA

DRIVER

2

5, 6

GND GND

7, SLUG

GND

the PA’s die temperature drops below TTH, the device

remains in thermal shutdown mode for the thermal shut-

down timeout period, tTH. A single capacitor, CTSET,

from TSET to ground sets tTH. The thermal shutdown

timeout period helps to limit device thermal cycling that

results if the source of the excessive temperature is not

removed. tTH is set by the value of CTSET.

Applications Information

Proper attention to voltage supply bypassing is essen-

tial for high-frequency RF circuit stability. Bypass VCC

with 0.1µF, 10nF, and 100pF capacitors in parallel with

each other to ground. Use separate vias to the ground

plane for each of the bypass capacitors and minimize

trace length to reduce inductance. Use separate vias to

the ground plane for each ground pin. Use low-induc-

tance ground connections.

Decouple SHDN, CTRL, D0, and D1 with 0.1µF capaci-

tors to ground to minimize noise on the internal bias cell.

Use a series resistor (typically 100Ω) to further reduce

coupling of high-frequency signals into the control pins.

Table 2. MAX2233 Operating Modes

Truth Table

MODE

D1

Shutdown

0

Low Power

0

Medium Power

1

High Power

1

OUTPUT POWER

D0

(PRFIN = 0dBm,

VCC = +3.6V)

0

< -35dBm

1

+6.5dBm

0

+15dBm

1

+24dBm

Functional Diagrams

VCC GND

16 15

BIAS

D0

4

2-BIT

D1 3 DAC

MAX2233

TEMP

10

SENSOR

VCC 11

VCC 12

8

RFIN 1

VGA DRIVER

2

5, 6

GND GND

7, SLUG

GND

TSET

RFOUT

_______________________________________________________________________________________ 7

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