![](/html/Cirrus-Logic/60748/page20.png)
CS8427
SDIN
ISCLK
ILRCK
RXP
SERIAL
AUDIO
INPUT
SIMS
RXD0
0
MUX
PLL
1
RMCKF MUX
1
0
÷
INC
CHANNEL
STATUS
MEMORY
SERIAL
AUDIO
OUTPUT
SDOUT
OSCLK
OLRCK
AES3
TRANSMIT
TXN
TXP
1
0
MUX
SWCLK
UNLOCK
USER
BIT
MEMORY
RMCK
0
MUX
1
RXD1
MUX
1
0
OUTC
÷
CLK[1:0]
OMCK
* Note: When SWCLK mode is enabled, signal input on OMCK is only output through RMCK and
not routed back through the RXD1 multiplexer; RMCK is not bi-directional in this mode.
Figure 8. CS8427 Clock Routing
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DS477F1