STA020(2010) Ver la hoja de datos (PDF) - STMicroelectronics

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STA020
(Rev.:2010)

96kHz DIGITAL AUDIO INTERFACE TRANSMITTER

STMicroelectronics 

STA020

PIN DESCRIPTION (continued)

N°

Pin

Function

24 TRNPT/FC1

Transmitter Interface

Transparent Mode/Frequency Control 1.

In professional mode, setting TRNPT low selects normal operation & CBL is an output.

Setting TRNPT high, allows the STA020D to be connected directly to an STA120. In

transparent mode, CBL is an input & MCK must be at 256 Fs. In consumer mode, FC0 and

FC1 are encoded versions of channel status bits 24 and 25. When FC0 and FC1 are both

high, CD mode is selected.

5

20, 17

MCK

TXP, TXN

Master Clock. Clock input at 128x the sample frequency which defines the transmit timing.

In trasparent mode MCK must be 256 Fs.

Differential Line Drivers.

DIGITAL CHARACTERISTICS (Tamb = 25°C; VD+ = 3.3V 10%)

Symbol

Parameter

Test Condition

Min. Typ. Max. Unit

VIH

t(s) VIL

c VOH

du VOL

ro Iin

P MCK

High-Level Input Voltage

Low-Level Input Voltage

High-Level Output Voltage

Low-Level Output Voltage

Input Leakage Current

Master Clock frequency

IO = 200µA

IO = 3.2mA

(Note 1)

2.0

VDD+0.3 V

-0.3

+0.8

V

VDD-1.0

V

0.4

V

1.0

10

A

26 MHz

lete Master Clock Duty Cycle

(high time/cycle time)

40

60

%

o Note 1: MCK must be 128x the input word rate, except in Transparent Mode where MCK is 256x the input word rate.

bs Figure 1. STA020D Professional & Consumer Modes Typical Connection Diagram.

- O EXTERNAL

)CLOCK

+3.3V

Product(s AUDIO

teDATA

lePROCESSOR

Obso µCONTROLLER

FSYNC

SCK

SDATA

CBL

C

U

MCK

5

7

6

8

15

10 STA020

VD+

19

18

24

23

22

21

GND

TRNPT

M0

M1

M2

0.1µF

SERIAL PORT

MODE SELECT

or

11

UNUSED

V

9

TXP

RST 16

20

TRANSMITTER

CHANNEL

STATUS BITS

17

8 DEDICATED C.S. BITS

TXN

CIRCUIT

CONTROL

D97AU600A

4/14

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