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SP8603

12-Bit Sampling A/D Converters

Signal Processing Technologies 

AC DYNAMIC TIMING DATA

SYMBOL/PARAMETER

tW

tDBC

tB

tAP

∆tAP

tC

tDBE

tDB

tA

tA + tC

R/C Pulse Width

BUSY delay from R/C

BUSY LOW

Aperture Delay

Aperture Jitter

Conversion Time

BUSY from End of Conversion

BUSY Delay after Data Valid

Acquisition Time

Throughput Time

SP8603

SP8605

SP8610

tHDR

Valid Data Held After R/C LOW

tS

CS or HBE LOW before R/C Falls

tH

CS or HBE LOW after R/C Falls

tDD

Data Valid from CS LOW, R/C HIGH, and HBE

in Desired State (Load = 100pF)

tHL

Delay to Hi-Z State after R/C Falls or

CS Rises (3KΩ Pullup or Pulldown

All parameters Guaranteed By Design.

MIN .

40

25

3.0

5.0

10.0

20

25

25

TYP.

80

2.47

13

150

2.5

100

75

130

50

5

0

65

50

MAX.

150

2.7

2.70

200

300

UNITS

ns

ns

µs

ns

ps, rms

µs

ns

ns

ns

µs

µs

µs

ns

ns

ns

150

ns

150

ns

R/C, it makes sense to keep the rising edge of the

convert pulse outside the time when bit decisions are

being made. In other words, the convert pulse should

either be short (under 100ns so that it transitions before

the MSB decision), or relatively long (i.e., for the

SP8603, over 2.75µs to transition after the LSB

decision).

Next, although the data outputs are forced into a Hi-Z

state during conversion, fast bus transients can still be

capacitively coupled into the SP86XX Series. If the

data bus experiences fast transients during conver-

sion, these transients can be attenuated by adding a

logic buffer to the data outputs. The BUSY output can

be used to enable the buffer.

Naturally, transients on the analog input signal are to

be avoided, especially at times within ±20ns of R/C

going LOW, when they may be trapped as part of the

charge on the capacitor array. This requires careful

layout of the circuit in front of the SP86XX Series.

Finally, in multiplexed systems, the timing relative to

when the multiplexer is switched may affect the

analog performance of the system. In most applica-

tions, the multiplexer can be switched as soon as R/C

goes LOW (with appropriate delays), but this may

affect the conversion if the switched signal shows

glitches or significant ringing at the SP86XX Series

input. Whenever possible, it is safer to wait until the

conversion is completed before switching and multi-

plexer. The extremely fast acquisition time and con-

version time of the SP86XX Series make this practi-

cal in many applications.

88

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