IDT723612 BiCMOS SyncBiFIFO™
64 x 36 x 2
CLKA
tCLKH
tCLK
tCLKL
FFA HIGH
CSA
W/RA
MBA
ENA
A0 - A35
tENS1
tENS1
tENH1
tENH1
tENS3
tENH3
tENS2
tENH2
tDS
tDH
W1(1)
ODD/
EVEN
PEFA
Note:
1. Written to FIFO1
tPDPE
Valid
COMMERCIAL TEMPERATURE RANGE
tENS2
tENH2
tENS2
tENH2
W2(1)
tPDPE
Valid
No Operation
3136 drw 05
Figure 2. Port-A Write Cycle Timing for FIFO1
14