IDT723612 BiCMOS SyncBiFIFO™
64 x 36 x 2
CLKB
tCLKH
tCLK
tCLKL
FFB HIGH
CSB
W/RB
MBB
ENB
B0 - B35
tENS1
tENS1
tENH1
tENH1
tENS3
tENH3
tENS2
tENH2
tDS
tDH
W1(1)
tENS2
tENH2
W2(1)
COMMERCIAL TEMPERATURE RANGE
tENS2
tENH2
No Operation
ODD/
EVEN
PEFB
Note:
1. Written to FIFO2
tPDPE
Valid
tPDPE
Valid
3136 drw 06
Figure 3. Port-B Write Cycle Timing for FIFO2
15