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SST89E54RDA(2011) Ver la hoja de datos (PDF) - Silicon Storage Technology

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SST89E54RDA
(Rev.:2011)
SST
Silicon Storage Technology SST
SST89E54RDA Datasheet PDF : 91 Pages
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A Microchip Technology Company
FlashFlex MCU
SST89E54RD2A/RDA / SST89E58RD2A/RDA
Not Recommended for New Designs
Reset Configuration of Program Memory Block Switching
Program memory block switching is initialized after reset according to the state of the Start-up Config-
uration bit SC0 and/or SC1. The SC0 and SC1 bits are programmed via an external host mode com-
mand or an IAP Mode command. See Table 13.
Once out of reset, the SFCF[0] bit can be changed dynamically by the program for desired effects.
Changing SFCF[0] will not change the SC0 bit.
Caution must be taken when dynamically changing the SFCF[0] bit. Since this will cause different
physical memory to be mapped to the logical program address space. The user must avoid executing
block switching instructions within the address range 0000H to 1FFFH.
Table 3: SFCF Values Under Different Reset Conditions
SC11
U (1)
U (1)
P (0)
P (0)
SC01
U (1)
P (0)
U (1)
P (0)
Power-on or External
Reset
00 (default)
01
10
11
State of SFCF[1:0] after:
WDT Reset or Brown-out
Reset
x0
x1
10
11
1. P = Programmed (Bit logic state = 0),
U = Unprogrammed (Bit logic state = 1)
Software Reset
10
11
10
11
T0-0.0 25114
Data RAM Memory
The data RAM has 1024 bytes of internal memory. The RAM can be addressed up to 64KB for external
data memory.
©2011 Silicon Storage Technology, Inc.
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