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STV8163 Ver la hoja de datos (PDF) - STMicroelectronics

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Lista de partido
STV8163 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
STV8163
ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
VOUT1LI Line Regulation
VOUT2LI Line Regulation
VOUT3LI Line Regulation
VOUT1LO
VOUT2LO
Load Regulation
Load Regulation
VOUT3LO Load Regulation
IQ
Quiescent Current
VO1RST
VRTH
Reset Threshold Voltage1
Reset Threshold Hysteresis
tRD
Reset Pulse Delay
VRL
Saturation Voltage in Reset
Condition
IRH
Leakage Current in Normal
Condition, at RESET pin
KOUT1
KOUT2
KOUT3
Output Voltage Thermal Drift
5.3 V < VIN1 < 10 V,
IOUT1 = 200 mA
7 V < VIN2 < 12 V,
IOUT2 = 200 mA
10 V < VIN3 < 15 V,
IOUT3 = 200 mA, VOUT3 = 8 V
5 mA < IOUT1 < 600 mA
5 mA < IOUT2 < 600 mA
5 mA < IOUT3 < 600 mA,
VOUT3 = 8 V
IOUT1 = 10 mA
Outputs 2 and 3 disabled
K = VOUT1, IOUT1 > 50 mA
See circuit description.
CE = 100 nF
See circuit description.
IRESET = 5 mA
VRESET = 10 V
TJ = 0 to 125°C
KOUT
=
-----V----O----U----T-------1---0----6-
T VOUT
30
mV
50
mV
80
mV
100
mV
100
mV
160
mV
2.2
3.0
mA
K-0.4 K-0.25 K-0.10
V
30
75
120
mV
25
ms
0.4
V
10
µA
100
ppm/°C
IOUT1SC Short Circuit Output Current
VIN1 = 5.3 V
0.8
1.3
1.8
A
IOUT2SC Short Circuit Output Current
VIN2 = 7 V
0.8
1.3
1.8
A
IOUT3SC Short Circuit Output Current
VIN3 = VOUT3 + 2V
0.8
1.3
1.8
A
VPROG Input Voltage at PROGRAM pin
2
V
IPROG Input Current at PROGRAM pin
5
µA
VDISH Voltage High Level at DISABLE pin (Outputs 2 and 3 active)
2
V
VDISL Voltage Low Level at DISABLE pin (Outputs 2 and 3 disabled)
0.8
V
IDIS
Bias Current at DISABLE pin
0 V < VDISABLE < 5.3 V
-100
2
µA
TJSD
Junction Temperature for Thermal Shutdown
150
°C
TSDH Thermal Shutdown Temperature Hysteresis
15
°C
1. This reset signal is activated by a decrease of VOUT1 voltage which can be due to an overload of pin OUT1
or by a lack of Input Voltage (VIN1).
5/11

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