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CMX673P1 Ver la hoja de datos (PDF) - CML Microsystems Plc

Número de pieza
componentes Descripción
Lista de partido
CMX673P1
CML
CML Microsystems Plc CML
CMX673P1 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Operating Characteristics
For the following conditions unless otherwise specified:
Xtal Frequency = 3.579545MHz, S/N = 16dB, Noise Bandwidth = 5kHz,
VDD = 3.0V to 5.0V, Tamb = -40°C to +85°C. 0dB = 775mVrms.
DC Parameters
IDD (ENABLE = ‘1’)
IDD (ENABLE = ‘1’)
(VDD = 5.0V)
(VDD = 3.0V)
Notes Min.
1
1
Typ.
1.0
0.5
AC Parameters
SIGIN pin
Input Impedance
Minimum Input Signal Level
Input Signal Dynamic Range
Signal to Noise Ratio
2
0.1
-38.0
40.0
16.0
Xtal/Clock Input
‘High’ Pulse Width
‘Low’ Pulse Width
Gain (I/P = 1mVrms at 100Hz)
3
100
3
100
20.0
Level Detector
Must Detect Signal Level
Must Not Detect Signal Level
4
-38.0
4
Call Progress Band
Must Detect Range
Must Not Detect Range
7
315
750
Logic Interface
Input Logic “1” Level
Input logic "0" level
Input leakage current (Vin = 0 to VDD)
Input Capacitance
Output logic "1" level (lOH = 120µA)
Output logic "0" level (lOL = 360µA)
5
80%
5
5
-5.0
5
10.0
6
90%
6
Max.
1.5
1.0
-50.0
650
250
20%
+5.0
10%
Units
mA
mA
M
dB
dB
ns
ns
dB
dB
dB
Hz
Hz
VDD
VDD
µA
pF
VDD
VDD
Notes:
1. Not including any current drawn from the detector pins by external circuitry.
2. Small signal impedance over the frequency range 100Hz to 2000Hz and at VDD = 5.0V.
3. Timing for an external input to the XTAL/CLOCK pin.
4. Input signal level at VDD = 5.0V, scale signal for different VDD.
5. ENABLE pin.
6. DETECT pin.
7. Nominal values which are subject to dynamic tolerances within the signal analysis process,
as a result of using stochastic signal processing techniques.
© 2001 Consumer Microcircuits Limited
10
D/673/5

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