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LC8955 Ver la hoja de datos (PDF) - SANYO -> Panasonic

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LC8955
SANYO
SANYO -> Panasonic SANYO
LC8955 Datasheet PDF : 4 Pages
1 2 3 4
Ordering number:ENN3215B
CMOS IC
LC8955
CD-I Format ADPCM Data Replay IC
Overview
The SANYO LC8955 is a stereo/mono replay IC for CD-I
format ADPCM data. In addition to an ADPCM decoding
circuit, the LC8955 also incorporates a DMA interface,
buffer RAM interface and a D/A converter serial interface.
The LC8955 interfaces directly with the SANYO LC8951
Real-time Error-correction and Host Interface Processor,
allowing a CD-I replay system to be configured easily.
The LC8955 is designed to operate with a host micropro-
cessor which sets the operating mode. It operates from a
single 5V supply, and is available in 80-pin plastic QIPs.
Features
• Real-time ADPCM decoder IC.
• Direct interface to SANYO’s LC8951 error-correction IC
for high-speed data transfer.
• Data transfer under program or DMA control.
• Independent data and control busses in auto-request trans-
fer.
• 8K byte external static RAM interface.
• Buffers up to 64 ADPCM sound groups in external RAM.
• DAC interface circuit.
• 80-pin plastic QIP.
Program transfer
The CPU writes each byte of data directly into the
LC8955 under program control. Data is transferred us-
ing the CPU data bus.
£ DMA transfer
Data is written into the LC8955 by an external DMA
controller using the CPU data bus. Up to 64 ADPCM
sound groups can be written to an external 8K byte buffer
RAM. One sound group consists of 128 bytes of CD-I
data.
The LC8955 then decodes data in the buffer without
intervention from the CPU or DMA controller, leaving
these devices free for other tasks.
Package Dimensions
unit:mm
3044B-QIP80A
[LC8955]
0.8 0.8
64
65
26.0
20.0
0.35
3.0
0.8
0.15
41
40
Functional Description
The LC8955 is divided into three major functional blocks.
ADPCM Input Block
The ADPCM input block has three data input modes, se-
lected by setting internal registers.
¡ Auto-request transfer
Data is transferred automatically into the LC8955’s data
port without CPU intervention. A number of handshak-
ing signals control data transfer. The input device can
be an LC8951 Real-time Error-correction and Host In-
terface Processor or another CD-ROM output device.
80
1
25
24
2.15
22.6
1.7
SANYO : QIP80A
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
62501TN (KT)/8030JN, TA/3260YT/D119TA, TS (US) No.3215–1/4

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