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TDA9814 Ver la hoja de datos (PDF) - Philips Electronics

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TDA9814 Datasheet PDF : 36 Pages
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Philips Semiconductors
Multistandard VIF-PLL with QSS-IF
and dual FM-PLL/AM demodulator
Product specification
TDA9814T
FUNCTIONAL DESCRIPTION
The integrated circuit comprises the functional blocks as
shown in Fig.1:
Vision IF amplifier
Tuner and VIF-AGC
Frequency Phase Locked Loop detector (FPLL)
VCO, Travelling Wave Divider (TWD) and AFC
Video demodulator and amplifier
Video buffer
SIF amplifier and AGC
Single reference QSS mixer
AM demodulator
FM-PLL demodulator
Internal voltage stabilizer and 12VP-reference.
Vision IF amplifier
The vision IF amplifier consists of three AC-coupled
differential amplifier stages. Each differential stage
comprises a feedback network controlled by emitter
degeneration.
Tuner and VIF-AGC
The AGC capacitor voltage is transferred to an internal IF
control signal, and is fed to the tuner AGC to generate the
tuner AGC output current (open-collector output). The
tuner AGC takeover point can be adjusted. This allows the
tuner and the SAW filter to be matched to achieve the
optimum IF input level.
The AGC detector charges/discharges the AGC capacitor
to the required voltage for setting of VIF and tuner gain in
order to keep the video signal at a constant level.
Therefore for negative video modulation the sync level and
for positive video modulation the peak white level of the
video signal is detected. In order to reduce the reaction
time for positive modulation, where a very large time
constant is needed, an additional level detector increases
the discharging current of the AGC capacitor (fast mode)
in the event of a decreasing VIF amplitude step. The
additional level information is given by the black level
detector voltage.
Frequency Phase Locked Loop detector (FPLL)
The VIF-amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier.
During acquisition the frequency detector produces a DC
current proportional to the frequency difference between
the input and the VCO signal. After frequency lock-in the
phase detector produces a DC current proportional to the
phase difference between the VCO and the input signal.
The DC current of either frequency detector or phase
detector is converted into a DC voltage via the loop filter,
which controls the VCO frequency. In the event of positive
modulated signals the phase detector is gated by
composite sync in order to avoid signal distortion for
overmodulated VIF signals.
VCO, Travelling Wave Divider (TWD) and AFC
The VCO operates with a resonance circuit (with L and C
in parallel) at double the PC frequency. The VCO is
controlled by two integrated variable capacitors. The
control voltage required to tune the VCO from its
free-running frequency to actually double the PC
frequency is generated by the frequency-phase detector
(FPLL) and fed via the loop filter to the first variable
capacitor. This control voltage is amplified and additionally
converted into a current which represents the AFC output
signal. The VCO centre frequency can be decreased
(required for L accent standard) by activating an additional
internal capacitor. This is achieved by using the L accent
switch. In this event the second variable capacitor can be
controlled by a variable resistor at the L accent switch for
setting the VCO centre frequency to the required L accent
value. At centre frequency the AFC output current is equal
to zero.
The oscillator signal is divided-by-two with a TWD which
generates two differential output signals with a 90 degree
phase difference independent of the frequency.
1998 Feb 09
6

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