Philips Semiconductors
TDA9910
12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC)
[8] Intermodulation measured relative to either tone with analog input frequencies fi1 and fi2. The two input signals have the same amplitude
and the total amplitude of both signals provides full-scale to the converter (−6 dB below full-scale for each input signal).
d3(IM3) is the ratio of the RMS value of either input tone to the RMS value of the worst case third order intermodulation product; d2(IM2) is
the ratio of the RMS value of either input tone to the RMS value of the worst case second order intermodulation product.
Table 6: Output coding with differential inputs
VIN(p-p) − VINN(p-p) = 1.9 V; VFSIN = VCCA1 − 1.77 V; typical values to AGND.
Code
VIN(p-p) VINN(p-p) IR
(V)
(V)
Binary outputs
(D11 to D0)
Two’s complement outputs
(D11 to D0)
Underflow < 2.675 > 3.625 0
0000 0000 0000 1000 0000 0000
0
2.675 3.625 1
0000 0000 0000 1000 0000 0000
1
-
-
1
0000 0000 0001 1000 0000 0001
...
...
...
...
...
...
2 047
3.15
3.15
1
0111 1111 1111 1111 1111 111
...
...
...
...
...
...
4 094
-
-
1
1111 1111 110
0111 1111 110
4 095
3.625 2.675 1
1111 1111 111
0111 1111 111
Overflow > 3.625 < 2.675 0
1111 1111 111
0111 1111 111
Table 7: Mode selection
Two’s complement output
(OTC)
0
1
X [1]
[1] X = don’t care.
Chip enable
input (CE_N)
0
0
1
Data output (D0 to D11; IR)
binary; active
two’s complement; active
high-impedance
n
CLK
50 %
D0 to D11
td(o)
data
n−1
data
n
td(s)
IN
sample
n
sample
n+1
sample
n+2
data
n+1
th(o)
sample
n+3
Fig 3. Output timing diagram.
VCCO − 0.5 V
0.5 V
sample
n+4
001aaa513
9397 750 14418
Objective data sheet
Rev. 02 — 9 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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