TDA9951 Ver la hoja de datos (PDF) - Philips Electronics
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TDA9951 Datasheet PDF : 41 Pages
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NXP Semiconductors
7. Pinning information
7.1 Pinning
TDA9951
CEC/I2C-bus translator
VFD_CLK 1
VFD_DAT 2
SBY 3
INT 4
CEC_OUT 5
RST_N 6
VSS 7
XTAL1 8
XTAL2 9
CEC_IN 10
SDA 11
SCL 12
VFD_STR 13
VFD_BLK 14
Fig 2. Pin configuration
TDA9951
28 IR_DAT
27 IR_VAL
26 A0
25 RSVD2
24 KROW0
23 KROW1
22 KROW2
21 VDD
20 KROW3
19 KROW4
18 RSVD1
17 RSVD0
16 PSEN
15 KCOL
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7.2 Pin description
Table 3. Pin description
Symbol
Pin Type[1]
VFD_CLK 1
O
VFD_DAT 2
O
SBY
3
O
INT
4
O
CEC_OUT 5
O
RST_N
6
I
VSS
XTAL1
XTAL2
CEC_IN
SDA
SCL
7
GND
8
I
9
O
10 I
11 I/O
12 I
Description
pulsed HIGH to clock output of the VFD display driver
data output to the VFD display driver
power control output to the host processor.
Operating mode = LOW-level
Standby mode = HIGH-level
interrupt line to the host processor. Indicates data is available for
reading. The polarity of operation is configured using the
common configuration register; default is INT_POL bit = 1,
active-HIGH
output to the CEC interface[2]
external reset input. Holding this input LOW resets the
TDA9951. It must be held LOW for a time after power-up when
using an 18 MHz crystal[2].
ground; 0 V reference
input to the oscillator and internal clock generator circuits
(18 MHz crystal)[2]
output from the oscillator amplifier
input from the CEC interface[2]
I2C-bus serial data input/output[2]
I2C-bus serial clock input[2]
TDA9951_1
Product data sheet
Rev. 01 — 7 August 2008
© NXP B.V. 2008. All rights reserved.
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