TDF8704 Ver la hoja de datos (PDF) - Philips Electronics
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TDF8704 Datasheet PDF : 20 Pages
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Philips Semiconductors
8-bit high-speed analog-to-digital converter
Product specification
TDF8704
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Timing (note 8; see Figs 5 and 7; fclk = 50 MHz)
tds
sampling delay time
th
output hold time
td
output delay time
−
−
2
ns
5
−
−
ns
−
12
15
ns
3-state output delay times (see Figs 6 and 7)
tdZH
enable HIGH
tdZL
enable LOW
tdHZ
disable HIGH
tdLZ
disable LOW
−
6
10
ns
−
12
16
ns
−
50
54
ns
−
10
14
ns
Notes
1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock
must be less than 1 ns.
2. Full-scale sine wave (fi = 4.43 MHz; fclk = 50 MHz).
3. Determined by beat frequency method on a reconstructed sine wave signal for no missing codes and no glitches.
4. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
input (square-wave signal) in order to sample the signal and obtain correct output data.
5. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 4K acquisition points per period. The
calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency).
Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB.
6. Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two
input signals have the same amplitude and the total amplitude of both signals provides full scale to the converter.
7. Measurement taken using video analyser VM700A.
8. Output data acquisition: the output data is available after the maximum delay time of td.
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V I (T)
(V)
3.47
VI (T)
3.45
VI (B)
0.1 mV/K
MBD868
1.29
VI (B)
(V)
1.27
0.05 mV/K
1.25
3.43
1.23
60
20
20
60
100
Tamb (oC)
Fig.3 Influence of Tamb on VI(T) and VI(B) under
5 V supply.
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V I (T)
(V)
3.42
3.40
VI (T)
V I (B)
MSA689
1.28
V I (B)
(V)
17 mV/V
1.26
7 mV/V
1.24
3.38
4.25
4.75
1.22
5.25 VCC (V) 5.75
Fig.4 Influence of supply voltage on VI(T) and
VI(B) under Tamb = 25 °C.
June 1994
9
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