Philips Semiconductors
High efficiency DC/DC converter
Preliminary specification
TEA1206T
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Voltage levels
VO(up)
output voltage range in up mode
U/D = LOW
2.80
−
5.50
V
VO(down) output voltage range in down mode U/D = HIGH
1.25
−
5.50
V
Vi(up)
input voltage range in up mode
U/D = LOW
Vstart
−
5.50
V
Vi(down) input voltage range in down mode U/D = HIGH
2.80
−
5.50
V
Vstart
start-up voltage
up mode; IL < 200 mA 1.40
1.60
1.85
V
Vfb
feedback voltage level
1.19
1.24
1.29
V
Current levels
Iq
quiescent current at pin 3
down mode, Vi = 3.6 V 65
75
Ishdwn
shut-down current
−
2
IlimN
current limit NFET
up mode; note 1
0.5
−
IlimP
current limit PFET
down mode; note 1
0.5
−
ILx
maximum continuous current at pin 4
−
−
Power MOSFETS
85
µA
10
µA
5.0
A
5.0
A
1.0
A
RdsON(N)
RdsON(P)
pin-to-pin resistance NFET
pin-to-pin resistance PFET
Efficiency; see Fig.5
0.08
0.14
0.20
Ω
0.10
0.16
0.25
Ω
η
efficiency
Vi = 3.6 up to 4.6 V
Vi = 3.6 down to 1.8 V
Vi = 3.6 V; L = 10 µH −
−
−
IL = 1 mA
−
86
−
%
IL = 10 mA
−
93
−
%
IL = 50 mA
−
93
−
%
IL = 100 mA
−
93
−
%
IL = 500 mA
−
93
−
%
IL = 1000 mA; pulsed −
87
−
%
load current
IL = 1 mA
−
83
−
%
IL = 10 mA
−
90
−
%
IL = 50 mA
−
91
−
%
IL = 100 mA
−
87
−
%
IL = 500 mA
−
88
−
%
IL = 1000 mA; pulsed −
82
−
%
load current
Timing
fsw
switching frequency
PWM mode
fsync
sync input frequency
tres
response time from standby to Pmax
475
560
645
kHz
9
13
20
MHz
−
25
−
µs
Note
1. Current limit is defined by an external resistor Rlim, having 1% accuracy. The typical value is presettable between
0.5 and 5.0 A with a spread of ±17.5%.
1999 Sep 16
3