TEA6840 Ver la hoja de datos (PDF) - Philips Electronics
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TEA6840 Datasheet PDF : 44 Pages
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Philips Semiconductors
New In Car Entertainment (NICE) car radio
Preliminary specification
TEA6840H
I2C-BUS AND I2C-BUS CONTROLLED FUNCTIONS
I2C-bus specification
The standard I2C-bus specification is expanded by the
following definitions.
• 1st chip address C2: 1100001 R/W
• 2nd chip address C0: 1100000 R/W.
Structure of the I2C-bus logic: slave transceiver with auto
increment.
Subaddresses are not used.
A second I2C-bus address can be selected by connecting
pin 15 via a 68 kΩ resistor to GND.
Connecting pin 15 to VDDA1 via a 100 kΩ resistor or
feeding 50 µA into that pin switches the IC into the test
mode.
TEST MODE
During test mode the digital-to-analog converters of the
level and antenna DAA functions can be sequenced by the
I2C-bus SCL line.
During test mode either the TEA6880H reference
frequency, the PLL reference frequency divider or the
programmable divider output can be switched to pin 15.
DATA TRANSFER FOR THE TEA6840H
Data sequence:
• Address
• Byte 1
• Byte 2
• Byte 3
• Byte 4
• Byte 5
• Byte 6.
The data transfer has to be in this order. The LSB = 0
indicates a WRITE operation to the TEA6840H. Bit 7 of
each byte is considered the MSB and has to be transferred
as the first bit of the byte.
The data becomes valid at the output of the internal
latches with the acknowledge of each byte. A STOP
condition after any byte can shorten transmission times.
When writing to the transceiver by using the STOP
condition before completion of the whole transfer:
• The remaining bytes will contain the old information
• If the transfer of a byte is not completed, this byte is lost
and the previous information is available.
In byte 5, 4 bits are reserved for test mode purposes.
Those can only be used when the test mode is activated
by the select pin 15.
Hints: When the IC is used together with the Car Analog
Sound Processor IC (TEA6880H) and when the SCL and
SDA lines are connected via Car Analog Sound Processor
IC’s I2C-bus buffer interface, the pull-up resistors of the
tuner IC should be connected to the digital supply voltage
of the TEA6880H. Otherwise a bus pull-down can occur
switching off the tuner IC supply when the I2C-bus buffer
interface of the TEA6880H is enabled for data transfer to
the tuner IC.
For new frequency setting, in both AM and FM mode, the
programmable divider is enabled by setting the mute bit
(data byte 3 bit 7) to logic 1.
To select an FM frequency, two I2C-bus transmissions are
necessary. First data byte 3 bit 7 = 1 and second data
byte 3 bit 7 = 0.
Default settings by power-on reset: To be defined.
1999 Jul 12
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