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TGA4501-EPU Ver la hoja de datos (PDF) - TriQuint Semiconductor

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Lista de partido
TGA4501-EPU
TriQuint
TriQuint Semiconductor TriQuint
TGA4501-EPU Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Advanced Product Information
December 14, 2001
TGA4501-EPU
TABLE II
DC PROBE TEST
(TA = 25 °C ± 5 °C)
Symbol Parameter
Minimum Maximum Unit
Idss (Q35)* Saturated Drain Current
15
70.5
mA
Gm(Q35)* Transconductance
33
79.5
mS
VP
Pinch-off Voltage
-1.5
BVGS(Q35)* Breakdown Voltage Gate-
-30
Source
BVGD(Q35)* Breakdown Voltage Gate-
-30
Drain
-0.5
V
-11
V
-11
V
* Q35 is a 150 um Test FET
TABLE III
AUTOPROBE FET PARAMETER MEASUREMENT CONDITIONS
FET Parameters
IDSS : Maximum drain current (IDS) with gate voltage
(VGS) at zero volts.
( ) IDSS IDS1
Gm : Transconductance; VG1
VP : Pinch-Off Voltage; VGS for IDS = 0.5 mA/mm of
gate width.
VBVGD : Breakdown Voltage, Gate-to-Drain; gate-to-drain
breakdown current (IBD) = 1.0 mA/mm of gate width.
VBVGS : Breakdown Voltage, Gate-to-Source; gate-to-
source breakdown current (IBS) = 1.0 mA/mm of gate
width.
Test Conditions
VGS = 0.0 V, drain voltage (VDS) is swept from 0.5 V up to
a maximum of 3.5 V in search of the maximum value of
IDS; voltage for IDSS is recorded as VDSP.
For all material types, VDS is swept between 0.5 V and
VDSP in search of the maximum value of Ids. This
maximum IDS is recorded as IDS1. For Intermediate and
Power material, IDS1 is measured at VGS = VG1 = -0.5 V.
For Low Noise, HFET and pHEMT material,
VGS = VG1 = -0.25 V. For LNBECOLC, use
VGS = VG1 = -0.10 V.
VDS fixed at 2.0 V, VGS is swept to bring IDS to 0.5 mA/mm.
Drain fixed at ground, source not connected (floating),
1.0 mA/mm forced into gate, gate-to-drain voltage (VGD)
measured is VBVGD and recorded as BVGD; this cannot be
measured if there are other DC connections between gate-
drain, gate-source or drain-source.
Source fixed at ground, drain not connected (floating),
1.0 mA/mm forced into gate, gate-to-source voltage (VGS)
measured is VBVGS and recorded as BVGS; this cannot be
measured if there are other DC connections between gate-
drain, gate-source or drain-source.
Note: Devices designated as EPU are typically early in their characterization process prior to finalizing all electrical and process
specifications. Specifications are subject to change without notice.
TriQuint Semiconductor Texas: Phone (972)994-8465 Fax (972)994 8504 Web: www.triquint.com
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