82C88 Ver la hoja de datos (PDF) - Intersil

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82C88

CMOS Bus Controller

Intersil 

82C88

AC Testing Input, Output Waveform

INPUT

VIH +0.4V

1.5V

VIL -0.4V

OUTPUT

VOH

1.5V

VOL

A.C. Testing: All input signals (other than CLK) must switch

between VIL -0.4V and VIH +0.4. CLK must switch between 0.4V

and VCC -0.4V. Input rise and fall times are driven at 1ns/V.

A.C. Test Circuit

V1

OUTPUT FROM

DEVICE

UNDER TEST

NOTE:

INCLUDES STRAY AND JIG CAPACITANCE

R1

TEST

POINT

C1 (SEE NOTE)

TABLE 2. TEST CONDITION DEFINITION TABLE

TEST CONDITION

V1

R1

C1

1

2.13V

220Ω

80pF

2

2.29V

91Ω

300pF

3

1.5V

187Ω

300pF

4

1.5V

187Ω

50pF

7

FN2979.2

August 25, 2005

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