Dual Mode CircLink™ Controller
Datasheet
The write signal differs depending on the CPU type:
nRWM = H: nDS signal at DIR = L
nRWM = L: nWR signal
NOTE: Refer to the AC timing specifications (in another document) for details (setup time, hold time, etc.).
Compare timing specifications for nEHWR=L and nEHWR=H.
1.6.4 Read Timing Selection
(nEHRD/NSTC[1]: Pin)
Peripheral mode: This pin selects the read timing type.
Standalone mode: This is NST- carry-output-digit selection NSTC[1].
[ In case of nMUX=H,nEHRD=H ]
A[5:0]
nCS
Read Signal
Address Sampling
timing
Tie to Hi for CPUs with valid address before nCS and the read signal go low.
[Example: nMUX = H and nEHRD = L]
A[5:0]
nCS
Read Signal
Address Sampling
timing
50ns
Tie to L for the CPU’s where nCS is enabled and addresses are valid after the read signal goes low.
SMSC TMC2074
Page 19
DATASHEET
Revision 0.1 (03-29-06)