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TMC2084

Standalone Mode CircLink™ Controller

SMSC -> Microchip 

Standalone Mode CircLinkTM Controller

Datasheet

Only port D remains in Hi-Z

while nRESET = L

Setting Value

Register

Clock

Reset

Reset

generator

Configuration by

shared pins

L

H

PD7-0

Output port

nRESET

Reset signal

Inside of LSI

Example 2: Configuring Port D as OUTPUT PORT - The case where the configuration by the shared

pins is different from the initial data from the OUTPUT PORT configured.

The figure below shows the case where the initial data from the OUTPUT PORT does conflict with the

configuration by shared pins when port D is configured as an OUTPUT PORT. Port D remains in high -

impedance state while the reset signal (nRESET) remains low. Also, the OUTPUT PORT remains in high-

impedance state during the period from the falling edge of reset to the beginning of the first output data

received.

During reset, the external tri-state buffer is enabled and the values configured by the shared pins are

inputted to port D. After the reset signal is deasserted, the tri-state buffer is disabled and the initial data

from the OUTPUT PORT is defined by an external pull-up (High) or pull-down (Low) resister. If initial data

from the OUTPUT PORT is needed during the reset, use an external gate as shown in the figure below to

define the data from OUTPUT PORT while the nRESET remains at low level.

A hold time greater than 5 ns is required to retrieve the data configured by the shared pins and place it in

the onchip memory. Thus, a buffer is added to provide a delay time for the control signal of an external tri-

state buffer.

Revision 0.1 (03-31-06)

Page 18

DATASHEET

SMSC TMC2084

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