AD7722(Rev0) Ver la hoja de datos (PDF) - Analog Devices

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AD7722
(Rev.:Rev0)

16-Bit, 195 kSPS CMOS, Sigma-Delta ADC

Analog Devices 

REV. 0

CLKIN

SCO

(CFMT = 0)

FSO

(SFMT = 0)

64 CKLIN CYCLES

32 SCO CYCLES

AD7722

SCO

VALID DATA FOR 16 SCO CYCLES

ZERO FOR LAST 16 SCO CYCLES VALID

Figure 2a. Generalized Serial Mode Timing (FSI = Logic Low or High, TSI = DOE)

CLKIN

64 CKLIN CYCLES

SCO

(CFMT = 0)

FSO

(SFMT = 1)

SCO

32 SCO CYCLES

LOW FOR 16 SCO CYCLES

VALID DATA FOR 16 SCO CYCLES

HIGH FOR LAST 16 SCO CYCLES

ZERO FOR LAST 16 SCO CYCLES VALID

Figure 2b. Generalized Serial Mode Timing (FSI = Logic Low or High, TSI = DOE)

CLKIN

FSI

SCO

2.3V

t5

t4

0.8V

t1

t6

t9

t9

t 10

t8

t7

t2

t3

Figure 3. Serial Mode Timing for Clock Input, Frame Sync Input and Serial Clock Output

CLKIN

FSI

SCO

SFMT = LOGIC FSO

LOW(0)

SDO

t1

t 10

t 11

t 12

t 14

D15

D14

D13

t 13

D1

D0

SCO

SFMT = LOGIC FSO

HIGH(1)

LOW FOR

D15–D0

t 12

t 13

SDO

D15

D14

D13

t 11

D1

D0

Figure 4. Serial Mode Timing for Frame Sync Input, Frame Sync Output, Serial Clock Output

and Serial Data Output (CFMT = Logic Low, TSI = DOE)

–5–

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