AD7722
DOE
t15
t16
SDO
Figure 5. Serial Mode Timing for Data Output Enable and Serial Data Output (TSI = Logic Low)
DRDY
CS
RD
DB0 – DB15
t 17
t 18
t 19
t 25
t 20
t 24
t 21
t22
t23
VALID DATA
CLKIN
SYNC, RESET
t 27
DVAL
DRDY
Figure 6. Parallel Mode Read Timing
t 30
t 28
t 31
t 26
t 29
CLKIN
CAL
DVAL
DRDY
Figure 7. SYNC and RESET Timing, Serial and Parallel Mode
t 36
t 34
t 35
t 37
t 38
Figure 8. Calibration Timing, Serial and Parallel Mode
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