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HC-55564

Continuously Variable Slope Delta-Modulator (CVSD)

Intersil 

HC-55564

Figures 4, 5, and 6 illustrate the typical frequency

response of the HC-55564 for varying input levels and for

varying sampling rates. To prevent slope overload (slew

limiting), the 0dB boundary should not be exceeded. The

frequency response is directly proportional to the sampling

clock rate. The flat bandwidth at 0dB doubles for every

doubling in sampling rate. The output levels were mea-

sured in the encode mode, without filtering, from AIN to

AOUT, at VDD = 5V. 0dB = 1.2VRMS.

AOUT

0dB = INPUT SIGNAL LEVEL

AIN

-6dB

-10

-12dB

-20

-18dB

-24dB

-30

-30dB

-36dB

-40

100

1000

10000

INPUT FREQUENCY AT AIN (Hz)

FIGURE 4. 16kbps

AOUT

AIN

0dB = INPUT SIGNAL LEVEL

-6dB

-12dB

-18dB

-24dB

-30dB

-36dB

100

1000

INPUT FREQUENCY AT AIN (Hz)

FIGURE 5. 32kbps

-10

-20

-30

-40

10000

AOUT

AIN

0dB = INPUT SIGNAL LEVEL

-6dB

-12dB

-18dB

-24dB

-30dB

-36dB

100

1000

INPUT FREQUENCY AT AIN (Hz)

FIGURE 6. 64kbps

5

-10

-20

-30

-40

10000

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