CS4630-CM Ver la hoja de datos (PDF) - Cirrus Logic
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CS4630-CM Datasheet PDF : 38 Pages
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CS4630
2. OVERVIEW
The CS4630 is a high performance audio accelera-
tor DSP for the PCI bus. This device, combined
with application and driver software, provides a
complete system solution for cost effective acceler-
ation of Microsoft’s DirectSound,
Direct Sound3D, DirectInput, MIDI playback via
Wavetable Synthesis with reverberation and chorus
effects processing, and more. The following fea-
tures can be enabled via updated device driver:
• Primary AC ‘97 Interface now 2.1 compatible
• 2nd AC ‘97 codec support
• Increased on-board memory for enhanced algo-
rithm execution and greater concurrency
• 128 DMA Streams Supported
• PCI Power Management Event Support(D0-
D3cold)
• Support for wake-up event via AC 97 2.1 Link
There are three main functional blocks within the
CS4630: the Stream Processor, the PCI Interface,
and the DMA Engine. A block diagram of the
CS4630 device is shown in Figure 7. The Stream
Processor (SP) is a high speed custom Digital Sig-
nal Processor (DSP) core specifically designed for
audio signal processing. This extremely powerful
DSP core is capable of running complex algorithms
and a number of different signal processing algo-
rithms simultaneously. This high concurrency capa-
bility is valuable for applications such as immersive
3D games, which may play a number of DirectSound
streams, a number of DirectSound3D streams, and a
MIDI music sequence simultaneously.
Separate RAM memories are included on-chip for
the SP program code (PROGRAM RAM), param-
eter data (PARAMETER RAM), and audio sample
data (SAMPLE RAM). Two ROM memories store
coefficients for sample rate conversion and audio
decompression algorithms (COEFFICIENT ROM)
and common algorithm code (PROGRAM ROM).
The RAM-based DSP architecture of the CS4630
ensures maximum system flexibility. The software
function/feature mix can be adapted to meet the re-
quirements of a variety of different applications,
such as DirectX™ games, DVD movie playback, or
DOS applications. This RAM-based architecture
also provides a means for future system upgrades,
PCI
Interface
128-Stream
DMA Controller
with Hardware
Scatter/Gather
PC/PCI &
CCLS Legacy
MPU-401
MIDI Interface
Joystick
In te rf a c e
Parameter
RAM
Sample
RAM
Program SLIMD
RAM SP Core
Program
ROM
Coefficient
ROM
Dual Codec
AC ’97 2.1
Interface
EGPIO
S/PDIF In
S/PDIF Out
ZV Port
Async. Serial
Port Interface
Figure 7. CS4630 Block Diagram
12
DS445PP1
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