A43L2616V-6PH Ver la hoja de datos (PDF) - AMIC Technology

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A43L2616V-6PH

1M X 16 Bit X 4 Banks Synchronous DRAM

AMIC Technology 

A43L2616-PH Series

Decoupling Capacitance Guide Line

Recommended decoupling capacitance added to power line at board.

Parameter

Symbol

Value

Unit

Decoupling Capacitance between VDD and VSS

CDC1

0.1 + 0.01

µF

Decoupling Capacitance between VDDQ and VSSQ

CDC2

0.1 + 0.01

µF

Note: 1. VDD and VDDQ pins are separated each other.

All VDD pins are connected in chip. All VDDQ pins are connected in chip.

2. VSS and VSSQ pins are separated each other

All VSS pins are connected in chip. All VSSQ pins are connected in chip.

DC Electrical Characteristics

(Recommended operating condition unless otherwise noted, TA = 0 to 70°C )

Symbol

Parameter

Test Conditions

Icc1

Icc2 P

Icc2 PS

Operating Current

(One Bank Active)

Burst Length = 1

tRC ≥ tRC(min), tCC ≥ tCC(min), IOL = 0mA

Precharge Standby Current CKE ≤ VIL(max), tCC = 15ns

in power-down mode

CKL ≤ VIL(max), tCC = ∞

ICC2N

ICC2NS

ICC3N

Precharge Standby Current

in non power-down mode

CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns

Input signals are changed one time during 30ns

CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

Input signals are stable.

Active Standby current in

non power-down mode

(One Bank Active)

CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns

Input signals are changed one time during 30ns

Speed

-6 -7

85

2

1

20

15

30

ICC4

Operating Current

IOL = 0mA, Page Burst

100

(Burst Mode)

All bank Activated, tCCD = tCCD (min)

ICC5 Refresh Current

tRC ≥ tRC (min)

130

ICC6 Self Refresh Current

CKE ≤ 0.2V

1

Note: 1. Measured with outputs open. Addresses are changed only one time during tCC(min).

2. Refresh period is 64ms. Addresses are changed only one time during tCC(min).

Unit Notes

mA

1

mA

mA

mA

mA

1

mA

2

mA

(May, 2002, Version 0.0)

5

AMIC Technology, Inc.

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