LTC1063CSW-TRPBF Ver la hoja de datos (PDF) - Linear Technology

Número de pieza

componentes Descripción

Lista de partido

LTC1063CSW-TRPBF

DC Accurate, Clock-Tunable 5th Order Butterworth Lowpass Filter

Linear Technology 

LTC1063

APPLICATI S I FOR ATIO

noise ratio at a given distortion level. The wideband noise

(µVRMS) is nearly independent of the value of the clock

frequency and excludes the clock feedthrough. The

LTC1063’s typical wideband noise is 95µVRMS. Figure 9

shows the same scope photo as Figure 8 but with a more

sensitive vertical scale: The clock feedthrough is imbed-

ded in the filter’s wideband noise. The peak-to-peak

wideband noise of the filter can be clearly seen; it is

approximately 500µVP-P. Note that 500µVP-P equals the

95µVRMS wideband noise of the part, multiplied by a crest

factor or 5.25.

Aliasing

Aliasing is an inherent phenomenon of sampled data filters

and it primarily occurs when the frequency of an input

signal approaches the sampling frequency. For the

LTC1063, an input signal whose frequency is in the range

of fCLK ±6% will generate an alias signal into the filter’s

passband and stopband. Table 4 shows details.

Example: LTC1063, fCLK = 20kHz, fC = 200kHz,

fIN = (19.6kHz, 100mVRMS)

fALIAS = (400Hz, 3.16mVRMS)

An input RC can be used to attenuate incoming signals

close to the filter clock frequency (Figure 10). A Butterworth

passband response will be maintained if the value of the

input resistor follows Table 1.

2µs/DIV

fCLK = 100kHz, fC = 1kHz, VS = ±5V, 1MHz SCOPE BW

1063 F08

Figure 8. LTC1063 Output Clock Feedthrough + Noise

2µs/DIV

fCLK = 100kHz, fC = 1kHz, VS = ±5V, 1MHz SCOPE BW

1063 F09

Figure 9. LTC1063 Output Clock Feedthrough + Noise

Table 4. Aliasing Data

INPUT FREQUENCY

0.9995fCLK

0.995 fCLK

0.99 fCLK

0.9875fCLK

0.985 fCLK

0.9825fCLK

0.98 fCLK

0.975 fCLK

0.97 fCLK

0.965 fCLK

0.96 fCLK

0.955 fCLK

0.95 fCLK

0.94 fCLK

0.93 fCLK

0.9 fCLK

OUTPUT FREQUENCY

0.0005 fCLK

0.005 fCLK

0.01 fCLK

0.0125 fCLK

0.015 fCLK

0.0175 fCLK

0.02 fCLK

0.025 fCLK

0.03 fCLK

0.035 fCLK

0.04 fCLK

0.045 fCLK

0.05 fCLK

0.06 fCLK

0.07 fCLK

0.1 fCLK

OUTPUT AMPLITUDE

REFERENCED TO

INPUT SIGNAL

0 dB

0 dB

– 3 dB

– 10.2 dB

– 17.7 dB

– 24.3 dB

– 30 dB

– 40 dB

– 48 dB

– 54.5 dB

– 60.4 dB

– 65.5 dB

– 70.16 dB

– 78.25 dB

– 85.3 dB

– 100.3 dB

R

VIN

C

V–

0.1µF

1

8

2

7

VOUT

LTC1063

3

6

4

5 fCLK

V+

0.1µF

fCLK

20

≤

1

2πRC

≤

fCLK

10

1063 F10

Figure 10. Adding an Input Anti-Aliasing RC

10

Share Link: