UPC8158K Ver la hoja de datos (PDF) - NEC => Renesas Technology
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UPC8158K
NEC => Renesas Technology
UPC8158K Datasheet PDF : 12 Pages
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µPC8158K
ELECTRICAL CHARACTERISTICS
Conditions (Unless otherwise specified):
TA = +25 °C, VCC1 = VCC2 = VCC3 = 3.0 V, VPS/VAGC = 2.5 V,
I/Q (DC) = Ib/Qb (DC) = VCC/2 = 1.5 V, VI/Ibin = VQ/Qbin = 500 mVP-P (each), fI/Qin = 2.625 kHz,
π/4DQPSK wave input, transmission rate 42 kbps, filter roll-off α = 0.5,
Modulation Pattern: <0000>
fLO1in = 178.05 MHz, PLO1in = –15 dBm
fLO2in = 1619.05 MHz, PLO2in = –15 dBm
fRFout = 1441 MHz – fI/Qin
Parameter
Symbol
Test Conditions
MIN.
UP-CONVERTER + QUADRATURE MODULATOR TOTAL
Total Circuit Current
Total Circuit Current at Power Save Mode
ICC (TOTAL)
ICC (PS) TOTAL
No input signal
VPS ≤ 0.5 V (Low),
No input signal
23.7
–
Total Output Power 1
PRFout1
VAGC = 2.5 V
–15
Total Output Power 2
PRFout2
VAGC = 1.0 V
–56.5
LO Carrier Leak
LOL
fLOL = fLO1 + fLO2
–
Image Rejection (Side Band Leak)
ImR
–
I/Q 3rd order distortion
IM3 (I/Q)
–
AGC Gain Control Range
GCR
VAGC = 2 V → 1 V
35
Error Vector Magnitude
EVM
MOD Pattern: PN9
–
Adjacent channel interference
Spurious suppression
Padj
∆f = ±50 kHz,
–
MOD Pattern: PN9
Pout (8fLO1) fLO1 × 8, fLO1 × 8 (image)Note
–
Power Save Rise Time
TPS (Rise)
VPS (Low) → VPS (High)
–
Power Save Fall Time
TPS (Fall)
VPS (High) → VPS (Low)
–
I/Q input impedance
ZI/Q
Between pin I/Ib, Q/Qb
80
I/Q input bias current
II/Q
Between pin I/Ib, Q/Qb
–
LO1 input VSWR
ZLO1
fLO1 = 100 M to 300 MHz
–
TYP.
28
0.3
–11.5
–52
–40
–40
–50
40
1.2
–65
–70
2
2
200
5
1.5:1
MAX.
37.6
10
–8
–46.5
–30
–30
–30
–
3.0
–60
–65
5
5
–
13
–
Unit
mA
µA
dBm
dBm
dBc
dBc
dBc
dB
%rms
dBc
dBc
µs
µs
kΩ
µA
–
Note Without external LC between Fil1 and Fil2 pin on this frequency conditions.
Spectrum analyzer conditions: VBW = 300 Hz, RBW = 300 Hz.
Remark Electrical characteristics in this document is described for 1.5 GHz system.
Preliminary Data Sheet P13831EJ1V1DS00
5
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