UPD16875 Ver la hoja de datos (PDF) - NEC => Renesas Technology

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UPD16875

DUAL Pch HIGH-SIDE SWITCH FOR USB

NEC => Renesas Technology 

OPERATION SEQUENCE

Power ON/OFF

IN (Input)

OUT

(Output)

Flg

(Output)

CTL

(Input)

5V

GND

5V

GND

5V

GND

5V

5V

GND

Overcurrent detection threshold

Iout

µPD16875

If the CTL signal is asserted active after power has been turned ON, OUT executes the soft-start operation (output

transition time: 8 ms MAX.). In addition, FLG output is fixed to “L” if the supply voltage is lower than the operating

voltage of the undervoltage lockout circuit (UVLO) on power application.

If all the CTL pins are inactive when power is supplied, the IC enters the standby status (IDD = 5 µA MAX.).

When Control Signals Are Input

IN (Input)

OUT

(Output)

FLG

(Output)

CTL

(Input)

5V

GND

5V

GND

5V

GND

5V

GND

Data Sheet S13895EJ1V0DS

9

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