UPD72870AF1 Ver la hoja de datos (PDF) - NEC => Renesas Technology
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UPD72870AF1 Datasheet PDF : 52 Pages
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3.2.1 Offset_14/18 Base_Address_1/2 Register (Cardbus Status Registers)
Bits
7-0
31-8
R/W
R
Constant value of 00.
R/W
-
Description
(1) Function Event Register (FER) ( Base Address 1 ( 2 )+ 0H )
Bits
0
1
2
3
4
14-5
15
31-16
R/W
Description
R
Write Protect (No Use).
Read only as ‘0’
R
Ready Status (No Use).
Read only as ‘0’
R
Battery Voltage Detect 2 (No Use).
Read only as ‘0’
R
Battery Voltage Detect 1 (No Use).
Read only as ‘0’
R/W
General Wakeup
R
Reserved. Read only as ‘0’
R/W
Interrupt
R
Reserved. Read only as ‘0’
(2) Function Event Mask Register (FEMR) ( Base Address 1 ( 2 )+ 4H )
Bits
0
1
2
3
4
5
6
13-7
14
15
31-16
R/W
Description
R
Write Protect (No Use).
Read only as ‘0’
R
Ready Status (No Use).
Read only as ‘0’
R
Battery Voltage Detect 2 (No Use).
Read only as ‘0’
R
Battery Voltage Detect 1 (No Use).
Read only as ‘0’
R/W
General Wakeup Mask
R
BAM. Read only as ‘0’
R
PWM. Read only as ‘0’
R
Reserved. Read only as ‘0’
R/W
Wakeup Mask
R/W
Interrupt
R
Reserved. Read only as ‘0’
µPD72870A
Preliminary Data Sheet S14653EJ1V0DS00
31
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