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UPD77018A

16 bits, Fixed-point Digital Signal Processor

NEC => Renesas Technology 

µPD77018A, 77019

• External data memory interface

Symbol

Pin No.

X/Y

7

DA13 - DA0

8, 9, 12 -19, 22 - 25

D15 - D0

MRD

MWR

WAIT

26 -29, 32 - 35, 38 - 41,

44 - 47

98

95

100

HOLDRQ

93

BSTB

99

HOLDAK

94

I/O

Function

O

Memory select signal output

(3S)

• 0: X memory is used.

• 1: Y memory is used.

O

Address bus to external data memory

(3S)

• External data memory is accessed.

• During the external memory is not accessed, these pins

keep the previous level.

These pins are set to low level; 0000H, by reset.

They continue outputting low level until the first external

memory access.

I/O

16 bits data bus to external data memory

(3S)

• External data memory is accessed.

O

Read output

(3S)

• Reads external memory

O

Write output

(3S)

• Writes external memory

I

Wait signal input

• Wait cycle is input when external memory is read.

1: No wait

0: Wait

I

Hold request signal input

• Input low level when external data memory bus is

expected to use.

O

Bus strobe signal output

• Outputs low level while the µPD77018A is occupying

external memory bus.

O

Hold acknowledge signal output

• Outputs low level when the µPD77018A permits external

device to use external data memory bus.

Remark The state of the pins added 3S becomes high impedance when bus release signal (HOLDAK = 0) is output.

11

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