USB2504-JT Ver la hoja de datos (PDF) - SMSC -> Microchip
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USB2504-JT Datasheet PDF : 46 Pages
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NAME
RESET Input
Self-Power /
Bus-Power
Detect
TEST Pins
Analog Test
&
Internal 1.8V
voltage
regulator
enable
Integrated USB 2.0 Compatible 4-Port Hub
Datasheet
Table 4.3 Miscellaneous Pins (continued)
SYMBOL
TYPE
FUNCTION
RESET_N
SELF_PWR
TEST[1:0]
ATEST/
REG_EN
IS
This active low signal is used by the system to reset the
chip. The minimum active low pulse is 1us.
I
Detects availability of local self-power source.
Low = Self/local power source is NOT available (i.e., Hub
gets all power from Upstream USB VBus).
High = Self/local power source is available.
IPD
Used for testing the chip. User must treat as a no-
connect or connect to ground.
AIO
This signal is used for testing the analog section of the
chip, and to enable or disable the internal 1.8v regulator.
This pin must be connected to VDDA33 to enable the
internal 1.8V regulator, or to VSS to disable the internal
regulator.
When the internal regulator is enabled, the 1.8V power
pins must be left unconnected, except for the required
bypass capacitors.When the PHY is in test mode, the
internal regulator is disabled and the ATEST pin
functions as a test pin.
NAME
VDD1P8
VDDAPLL3P3
VDDAPLL1P8
VDDIO3P3
VDDA3P3
VSS
Table 4.4 Power, Ground, and No Connect
SYMBOL
TYPE
FUNCTION
VDD18
VDDA33PLL
VDDA18PLL
VDD33
VDDA33
VSS
+1.8V core power.
If the internal regulator is enabled, then VDD18 pin 54
must have a 4.7μF (or greater) ±20% (ESR <0.1Ω)
capacitor to VSS
+3.3V Filtered analog power for the internal PLL
If the internal PLL 1.8V regulator is enabled, then this pin
acts as the regulator input
+1.8V Filtered analog power for internal PLL.
If the internal regulator is enabled, then this pin must
have a 4.7μF (or greater) ±20% (ESR <0.1Ω) capacitor
to VSS
+3.3V I/O power.
+3.3V Filtered analog power.
Ground.
Revision 2.3 (08-27-07)
14
DATASHEET
SMSC USB2504/USB2504A
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