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W144H Datasheet PDF : 14 Pages
First Prev 11 12 13 14
W144
24-MHz Clock Output (Lump Capacitance Test Load = 20 pF= 66.6/100 MHz (continued)
CPU = 66.6/100.2 MHz
Parameter
Description
Test Condition/Comments
Min. Typ. Max. Unit
fST
Frequency Stabilization Assumes full supply voltage reached within 1 ms from –
3
ms
from Power-up (cold power-up. Short cycles exist prior to frequency stabili-
start)
zation.
Zo
AC Output Impedance Average value during switching transition. Used for
40
determining series termination value.
Ordering Information
Ordering Code
W144H
W144HT
Package Type
48-Pin SSOP (300-mil)
48-Pin SSOP (300-mil) – Tape and Reel
Package Drawing and Dimension
48-Lead Shrunk Small Outline Package O48
51-85061-*C
Intel is a registered trademark of Intel Corporation. Purchase of I2C components from Cypress, or one of its sublicensed
Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system,
provided that the system conforms to the I2C Standard Specification as defined by Philips. All product and company names
mentioned in this document are the trademarks of their respective holders.
Document #: 38-07153 Rev. *B
Page 13 of 14
© Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

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