W83194BR-B Ver la hoja de datos (PDF) - Winbond
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W83194BR-B Datasheet PDF : 19 Pages
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W83194BR-B
STEPLESS CLOCK FOR INTEL BROOKDALE CHIPSET
7. I2C CONTROL AND STATUS REGISTERS
7.1 Register 0: Frequency Select Register (Default = 0)
Bit
Name
PWD Description
0 Enable Spread Spectrum in the frequency table.
7
EN_SPSP
0 = Normal
1 = Spread Spectrum enabled
6
SSEL [4]
0
5
SSEL [3]
0
4
SSEL [2]
0 Frequency selection by software via I2C.
3
SSEL [1]
0
2
SSEL [0]
0
0 Enable software program FS [4:0].
1
EN_SSEL
0 = Select frequency by hardware.
1= Select frequency by software I2C - Bit 6 ~ 2.
0 Enable reload safe frequency when the watchdog is timeout.
0 EN_SAFE_FREQ
0 = reload the FS [4:0] latched pins when watchdog time out.
1 = reload the safe frequency bit defined at Register 6 bit 4~0.
7.2 Register 1: CPU Clock Register (1 = Enable, 0 = Stopped)
Bit Pin NO PWD Description
7
47, 46
1 CPUCLKT2 / C2
6
44, 43
1 CPUCLKT1 / C1
5
40, 39
1 CPUCLKT0 / C0
4
-
X FS [4] Read back.
3
-
X FS [3] Read back
2
-
X FS [2] Read back
1
-
X FS [1] Read back
0
-
X FS [0] Read back
7.3 Register 2: PCI Clock Register (1 = Enable, 0 = Stopped)
Bit Pin NO PWD Description
7
-
X MULTISEL0 trapping pin data read back
6
17
1 PCICLK 6
5
16
1 PCICLK 5
4
15
1 PCICLK 4
3
12
1 PCICLK 3
2
11
1 PCICLK 2
1
10
1 PCICLK 1
0
9
1 PCICLK 0
Publication Release Date: February 2003
-7-
Revision 2.0
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