W83194BR-S Ver la hoja de datos (PDF) - Winbond
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W83194BR-S Datasheet PDF : 17 Pages
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W83194BR-S
6.4 Register 3: Control Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7
1
9 3V66_2(Active/Inactive)
6
1
8 3V66_1(Active / Inactive)
5
1
7 3V66_0(Active / Inactive)
4
1
23 24_48MHz (Active / Inactive)
3
1
47 IOAPIC (Active / Inactive)
2
1
21 48MHz0 (Active / Inactive)
1
1
22 48MHz1 (Active / Inactive)
0
1
1 REF2X (Active / Inactive)
PRELIMINARY
6.5 Register 4: Control Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7
0
- SSEL3 (Frequency table selection by software via I2C )
6
0
- SSEL2 ( Frequency table selection by software via I2C)
5
0
- SSEL1 ( Frequency table selection by software via I2C)
4
0
- SSEL0 ( Frequency table selection by software via I2C)
3
0
- 0 = Selection by hardware
1 = Selection by software I2C - Bit (1,2, 4:6)
2
0
- SSEL4 (Frequency table selection by software via I2C )
1
0
- SSEL5 (Frequency table selection by software via I2C )
0
0
- 0 = Running
1 = Tristate all outputs
6.6 Register 5: Skew Register
Bit @PowerUp Pin
Description
7
1
- CSkew2 (CPU to SDRAM skew program bit)
6
0
- CSkew1 (CPU to SDRAM skew program bit)
5
0
- CSkew0 (CPU to SDRAM skew program bit)
4
1
- CASkew2 (CPU to 3V66 skew program bit)
3
0
- CASkew1 (CPU to 3V66 skew program bit)
2
0
- CASkew0 (CPU to 3V66 skew program bit)
1
1
51 CPUCLK1(Active/Inactive)
0
1
52 CPUCLK0(Active / Inactive)
-9-
Publication Release Date: June 2000
Revision
0.42
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