W83195BG-101 Ver la hoja de datos (PDF) - Winbond
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W83195BG-101 Datasheet PDF : 27 Pages
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W83195BR/G-101
STEPLESS FOR INTEL 915/925 CHIPSETS
Register 7: Winbond Chip ID (Default: 22h) (Read Only), continued
BIT
NAME
PWD
4 CHPI_ID [4]
0 Winbond Chip ID.
3 CHPI_ID [3]
0 Winbond Chip ID.
2 CHPI_ID [2]
0 Winbond Chip ID.
1 CHPI_ID [1]
1 Winbond Chip ID.
0 CHPI_ID [0]
0 Winbond Chip ID.
DESCRIPTION
TYPE
R
R
R
R
R
7.9 Register 8: M/N Program (Default: D0h)
BIT
NAME
PWD
DESCRIPTION
7 N_DIV [8]
1
Programmable N divisor value. Bit7~0 are defined in the
Register 9
6 N_DIV [9]
1
Programmable N divisor value. Bit7~0 are defined in the
Register 9
5 M_DIV [5]
0
4 M_DIV [4]
1
3 M_DIV [3]
2 M_DIV [2]
0
Programmable M divisor value.
0
1 M_DIV [1]
0
0 M_DIV [0]
0
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7.10 Register 9: M/N Program Register (Default: 7Ah)
BIT
NAME
PWD
DESCRIPTION
TYPE
7 N_DIV [7]
0
R/W
6 N_DIV [6]
1
R/W
5 N_DIV [5]
1
R/W
4 N_DIV [4]
3 N_DIV [3]
1 Programmable N divisor value bit 7 ~0. The bit 8 is defined R/W
1 in Register 8.
R/W
2 N_DIV [2]
0
R/W
1 N_DIV [1]
1
R/W
0 N_DIV [0]
0
R/W
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Publication Release Date: March 2006
Revision 0.7
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