W83626D Ver la hoja de datos (PDF) - Winbond
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W83626D Datasheet PDF : 23 Pages
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W83626F/W83626D/W83626G
5.1.4 Clock Buffer and Generator
SYMBOL
14.318M
14MOUT 1
14MOUT 2
24.576M
25.000M
PIN
I/O
FUNCTION
26
INt Main 14.318 MHz Clock Input.
27 OUT12t 14.318 MHz Buffer Output 1.
28 OUT12t 14.318 MHz Buffer Output 2.
This pin is weak pull-up during 3 VDD ramp-up period. The default
setting is 24.576 MHz and selected 25.000 MHz by external
pull-down with 4.7K ohm (recommended) during power ramp-up
29 OUT12t period.
24.576 MHz Clock Output for Audio Codec or selected 25.000
MHz Clock Output for LAN on board solution.
5.1.5 Power Signals
SYMBOL
PIN
VCC5
5, 45, 55, 70, 85, 105, 120,
VCC3
20
GND
15, 50, 60, 80, 95, 110, 125
AVCC3
25
AGND
30
I/O
PWR
PWR
PWR
PWR
PWR
FUNCTION
Digital 5V Supply.
Digital 3.3V Supply.
Digital Ground.
Analog 3.3V Supply.
Analog Ground.
5.1.6 Power-on strapping Signals
SYMBOL
PIN
I/O
80PCS#/KBEN#
36
I/OD12t
ROMCS#
37
I/OD12t
MASTER/RTCEN#
123
INt
DACK6#/HEFRAS
128
I/OD24t
FUNCTION
Power-on
strapping
with
pulled-down register will enable
K/B and mouse functions. When it
is set, pin 38, 39 and 40 will do
IRQ1, KBCS# and MCCS# signals.
If there is a boot-ROM (BIOS), the
signal must power-on with a weak
pulled-high register.
Power-on
strapping
with
pulled-down register will enable
RTC functions. When it is set, pin
64 and 65 will do IRQ8 and RTCCS#
signals.
Set this function will change the
port that is used to access
configuration-registers. Default
setting is 4Eh, but by power-on
strapping with a pulled-down
register change to 2Eh.
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