W83977F Ver la hoja de datos (PDF) - Winbond
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W83977F Datasheet PDF : 181 Pages
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W83977F/ W83977AF
PRELIMINARY
9.1.1 Wait for Key State ............................................................................................................................115
9.1.2 Sleep State........................................................................................................................................115
9.1.3 Isolation State ..................................................................................................................................115
9.1.4 Configure State.................................................................................................................................115
9.2 COMPATIBLE PNP ...............................................................................................................................116
9.2.1 Extended Function Registers ............................................................................................................116
9.2.2 Extended Functions Enable Registers (EFERs).................................................................................116
9.2.3 Extended Function Index Registers (EFIRs), Extended Function Data Registers(EFDRs) .................116
10. CONFIGURATION REGISTER...............................................................................117
10.1 CHIP (GLOBAL) CONTROL REGISTER ............................................................................................117
10.2 LOGICAL DEVICE 0 (FDC) ................................................................................................................122
10.3 LOGICAL DEVICE 1 (PARALLEL PORT)..........................................................................................126
10.4 LOGICAL DEVICE 2 (UART A)¢)......................................................................................................128
10.5 LOGICAL DEVICE 3 (UART B)..........................................................................................................129
10.6 LOGICAL DEVICE 4 (REAL TIME CLOCK)......................................................................................130
10.7 LOGICAL DEVICE 5 (KBC)................................................................................................................131
10.8 LOGICAL DEVICE 6 (IR)....................................................................................................................132
10.9 LOGICAL DEVICE 7 (AUXILIARY I/O PART I)................................................................................134
10.10 LOGICAL DEVICE 8 (AUXILIARY I/O PART II).............................................................................138
11. SPECIFICATIONS.....................................................................................................142
11.1 ABSOLUTE MAXIMUM RATINGS ....................................................................................................142
11.2 DC CHARACTERISTICS.....................................................................................................................142
11.3 AC CHARACTERISTICS.....................................................................................................................146
11.3.1 FDC: Data rate = 1 MB, 500 KB, 300 KB, 250 KB/sec. .................................................................146
11.3.2 UART/Parallel Port ........................................................................................................................148
11.3.3 Parallel Port Mode Parameters ......................................................................................................148
11.3.4 EPP Data or Address Read Cycle Timing Parameters ....................................................................149
11.3.5 EPP Data or Address Write Cycle Timing Parameters....................................................................150
11.3.6 Parallel Port FIFO Timing Parameters...........................................................................................151
11.3.7 ECP Parallel Port Forward Timing Parameters..............................................................................151
11.3.8 ECP Parallel Port Reverse Timing Parameters...............................................................................151
11.3.9 KBC Timing Parameters.................................................................................................................152
Publication Release Date:March 1998
-VI -
Preliminary Revision 0.58
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