W921C880 Ver la hoja de datos (PDF) - Winbond
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W921C880 Datasheet PDF : 57 Pages
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W921E880A/W921C880
6.4 Initial State
The W921E880A/W921C880 is reset either by power-on reset or by using the external RESET pin.
The initial state of the W921E880A/W921C880 after the reset function is executed is described
below. The EVF interrupt request signal register value is random, so user must do CLR EVF,
#11111111b instruction to clear all interrupt request signals after power-on reset.
Program counter (PC)
Stack pointer
Special function registers
TM0, TM1, TM2, TM3 input clock
TM0, TM1, TM2, TM3 contents
Input/Output
PM registers
DTMF output
EVF interrupt request signal register
0000H
0FFH
Refer to special control register table
FOSC/8
0FFH
Input mode
1111B
Disable (H-Z)
Random
6.5 Input/Output
There are 64 I/O pins (4 pins × 16 ports) including 12 large drive current pins, and 12 large sink
current pins in this chip. All the I/O pins will remain in an input mode after a power on reset.
The input or output status of port 0 to port 7 can be controlled by the port mode register PMx, where x
= 0 to 7. A zero indicates the corresponding pin is an output, a one indicates the relative pin is an
input. For example, MOV PM0, #0101B sets P0.0 and P0.2 as inputs and P0.1 and P0.3 as outputs.
The I/O instructions cannot affect the I/O status in Port 0 to Port 7.
The input or output mode of port 8 to port F only can be decided by I/O instructions. For example,
MOV A, Px will change Px to input mode and MOV Px, A will change it to output mode.
The I/O instructions are described as follows:
MOV
MOV
MOV
MOV
A, Px
B, Px
Px, A
Px, B
input Port x to A reg.
input Port x to B reg.
output A reg. data to Port x.
output B reg. data to Port x.
* P0.0−P0.3:
* P1.0−P1.3:
* P2.0−P2.3:
Four 10 mA drive current pins
Normal I/O pins only.
Four 10 mA drive current pins
Normal I/O pins only.
Normal function is the same as port P0
Four 15 mA sink current pins
Normal I/O pins only.
Normal function is the same as port P0
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