WCMC1616V9X Ver la hoja de datos (PDF) - Weida Semiconductor, Inc.

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WCMC1616V9X

1Mb x 16 Pseudo Static RAM

Weida Semiconductor, Inc. 

ADVANCE INFORMATION

WCMC1616V9X

Notes:

16. Data I/O is high impedance if OE = VIH .

17. If Chip Enable goes INACTIVE simultaneously with WE HIGH, the output remains in a high-impedance state.

18. During the DON’T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.

Write Cycle No. 3 (WE Controlled, OE LOW)[17, 18]

tWC

ADDRESS

CE1

tSCE

C E2

BHE/BLE

tSA

WE

tBW

tAW

tPWE

DATAI/O DON’T CARE

tHZWE

Write Cycle No. 4 (BHE /BLE Controlled, OE LOW)[17, 18]

tWC

ADDRESS

tSD

VALID DATA

tHA

tHD

tLZWE

CE1

CE2

BHE/BLE

WE

DATA I/O

tSA

DON’T CARE

tSCE

tAW

tBW

tPWE

tSD

VALID DATA

tHA

tHD

Document #: 38-14027 Rev. **

Page 9 of 13

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