WM8569 Ver la hoja de datos (PDF) - Wolfson Microelectronics plc
Número de pieza
componentes Descripción
Lista de partido
WM8569 Datasheet PDF : 36 Pages
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Production Data
DACBCLK/
ADCBCLK
(Output)
DACLRC/
ADCLRC
(Output)
DOUT
WM8569
t
DL
t
DDA
DIN
t
DST
t
DHT
Figure 3 Digital Audio Data Timing – Master Mode
Test Conditions
AVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN, DGND = 0V, TA = +25oC, Master Mode, fs = 48kHz, MCLK = 256fs unless
otherwise stated.
PARAMETER
SYMBOL
Audio Data Input Timing Information
DACLRC/ADCLRC
tDL
propagation delay from
DACBCLK/ADCBCLK
falling edge
DOUT propagation delay
tDDA
from ADCBCLK falling edge
DIN setup time to
tDST
DACBCLK rising edge
DIN hold time from
tDHT
DACBCLK rising edge
TEST CONDITIONS
Table 2 Digital Audio Data Timing – Master Mode
MIN
TYP
MAX
UNIT
0
10
ns
0
10
ns
10
ns
10
ns
w
PD Rev 4.0 June 2006
9
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